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One of the specs you'll hear thrown around when you're shopping for a CPU is the process node

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measured in nanometers and how a smaller one is better. Just check out the tech headlines and

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you'll see plenty of stories about how chip makers are racing to cram more and more tiny

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transistors onto their processors. And why not? More transistors means better performance and

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efficiency because the electrons don't have to travel as far through each transistor so they

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can switch on and off and therefore process information more quickly. But do process nodes

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really tell the whole story? To get some answers, we reached out to Jason Gorse and Bruce Feinberg

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from Intel and we'd like to thank them for their contributions. The process node was originally a

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measure of how long the gate in the transistor was. This is the part that actually controls the

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flow of electrons from the source to the drain. This was considered an accurate enough proxy

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for transistor size up until about 1997 when the 350 nanometer process was popular. The reason

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this is important is because when you double the number of transistors on a chip, it's fair to

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expect roughly double the performance at a given die size. And for a long time, these

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doublings, if you will, took place at such predictable intervals that Moore's law came to be,

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stating that the number of transistors on a chip would double about every two years.

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This gave the chip makers an easy cadence to follow for naming each process node because they could

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expect each one to be smaller by a factor of about 0.7. Why 0.7, you might ask? Well, the

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transistors are roughly square in shape and if you multiply 0.7 by 0.7, you get 0.49 or roughly

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one half. So for example, when the industry went from the 1000 nanometer process node to the 700

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nanometer process node, this marked a rough doubling of the number of transistors that they

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could fit in a given area, even though the name of the process only reduced by a factor of 0.7.

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Thing is, in 1997, while manufacturers were able to start shrinking the gate length by more than a

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factor of 0.7, other parts of the transistor weren't shrinking as quickly anymore. So gate

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length was no longer a good proxy for the overall transistor density in the entire chip,

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and therefore the performance. Rather than changing the naming scheme outright though,

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we started to see a process node defined by the size of a group of transistors called a cell.

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This was done to give people an estimate of the equivalent level of processing power

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accounting for components that weren't shrinking as quickly. So the first node we saw under this

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new naming system was the 250 nanometer process. Performance was about double the previous node,

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as you would expect from the name, but the gate length was actually around 190 nanometers,

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which is much smaller. It's just that there was other stuff that prevented the transistors from

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being packed more tightly than that. This scheme involving cell area lasted until around 2012

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and the 22 nanometer process when a whole new type of transistor was introduced, FinFET.

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Chipmakers found that at these sizes, the gates were so small that you could have electrons leaking

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through them due to quantum tunneling. This could cause undesirable behavior, so engineers needed

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a way to make their chips more powerful without shrinking the gates even further. The solution

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was to take the channel the electrons go through and raise it up like a shark fin, hence the name

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increasing the surface area of the channel and allowing lots more electrons to pass through.

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Of course, this also meant that transistors were now three-dimensional instead of planar,

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making it much harder to accurately measure their size. Now the industry has still continued to use

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that 0.7 factor to describe a generation of improvement, like going from 14 to 10 to 7

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nanometer processes. But the truth of the matter is that these numbers don't actually measure the

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real size of the transistor anymore, and they can even vary wildly between different manufacturers.

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Intel, for example, attempts to measure a process node by taking the weighted average

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of the two most common standard cell sizes. Really, a more important consideration though

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is transistor density. That's how many can be packed into the same space without decreasing

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the size of the actual transistor features very much, if at all. In addition to density,

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chip makers are using other techniques like improved materials to boost performance.

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This can include everything from squeezing the crystal structure of the channel to make the

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electrons go through faster, to low resistance traces between transistors, to gate materials

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with a high dielectric constant for better control of electron flow. Of course, this process can

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require some trial and error. Intel's well-publicized difficulties with their 10 nanometer process

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were due in large part to them trying to overscale. In other words, pack more than double the number

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of transistors into the same space, which required them to try lots of new technologies inside the

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chip all at one time, which caused delays and manufacturing problems. But as our technology

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continues to improve, chip makers look poised to keep Moore's law, even if it's a little slower,

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alive to some extent, as well as keep silicon, the base material for our processors, for a long

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time to come before we have to really start considering more exotic solutions, like carbon

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nanotubes. In the meantime, I hope you enjoyed this deeper dive into processor sizes. Just remember

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that the process node isn't the be-all and end-all when you're shopping for a CPU anyway. It's

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always more important to pay attention to the real-world performance that you'll see in games

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and applications that you actually use. Thanks for watching, guys. Like, dislike, check out our

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