WEBVTT 00:00:00.000 --> 00:00:05.200 Every computer needs RAM to function. But did you know that pretty much all the RAM we use these days 00:00:05.200 --> 00:00:08.880 uses some clever tricks to run much faster than it otherwise would? 00:00:09.520 --> 00:00:15.280 Even older RAM, like this, DDR3 I'm holding, uses these techniques. 00:00:15.280 --> 00:00:20.240 In fact, it's right in the name. DDR stands for double data rate, which means, 00:00:20.240 --> 00:00:25.600 just what it sounds like it means, it can move data twice as quickly as single data rate memory, 00:00:25.600 --> 00:00:32.080 which hasn't been in our computers for very long. The original DDR actually came out way back in 2000, 00:00:32.080 --> 00:00:35.600 not to be confused with the other DDR which came out in 1998. 00:00:35.600 --> 00:00:39.520 Unfortunately, I don't have a stick of the original DDR to show you, 00:00:39.520 --> 00:00:46.160 but I can show you a bit about how it works. So this is an example of a simple clock signal 00:00:46.160 --> 00:00:49.760 that your computer uses to keep components inside synced up. 00:00:50.400 --> 00:00:54.160 Conventionally, one piece of data is sent per cycle, 00:00:54.160 --> 00:01:00.560 or for each one of these humps. But you see how each cycle has a rising and a falling edge? 00:01:00.560 --> 00:01:04.560 Well, DDR sends data on both the rising and the falling edges, 00:01:04.560 --> 00:01:10.640 which works because your memory modules can detect at what point the internal clock is in its cycle. 00:01:10.640 --> 00:01:17.600 But hold on a second, this would only be double the data rate over a super old school single data rate RAM. 00:01:17.600 --> 00:01:22.400 So how are we getting generational improvements like DDR2, 3, and 4, 00:01:22.400 --> 00:01:25.760 which continue to increase the data rate by a factor of 2, 00:01:25.760 --> 00:01:32.080 each time? It turns out that there are actually two clocks involved in what make DDR RAM work, 00:01:32.080 --> 00:01:35.520 the external bus that connects your RAM to the rest of the system, 00:01:35.520 --> 00:01:40.720 and an internal memory clock. For DDR2, the internal clock was kept the same, 00:01:40.720 --> 00:01:48.240 but the external bus clock was doubled. This means that the external bus can carry twice as much data per unit of time. 00:01:48.240 --> 00:01:52.720 To take advantage of this, the internal memory array where the data is actually stored 00:01:52.720 --> 00:01:57.120 doubles the number of bits sent at one time to the external memory bus. 00:01:57.120 --> 00:02:02.560 This process is also called prefetching, and it's responsible for why DDR2 is faster than DDR, 00:02:02.560 --> 00:02:08.720 and why DDR3 is faster than DDR2. The external bus's faster clock can then carry the extra data, 00:02:08.720 --> 00:02:13.920 and boom, you've got faster memory. Advances in manufacturing that keeps signal integrity high 00:02:13.920 --> 00:02:18.560 have allowed newer versions of DDR to operate at these higher speeds without a hitch. 00:02:18.560 --> 00:02:22.640 It should be noted, however, that DDR4 works slightly differently 00:02:22.640 --> 00:02:25.920 in that memory arrays are divided into bank groups, 00:02:25.920 --> 00:02:29.200 which means that prefetches can be pulled from different parts of the RAM 00:02:29.200 --> 00:02:32.960 at the same time, leading to higher speeds than DDR3. 00:02:32.960 --> 00:02:36.800 Boosting the external clock is also part of how newer versions of DDR 00:02:36.800 --> 00:02:40.640 can run at faster clock speeds while drawing less power. 00:02:40.640 --> 00:02:45.600 Because the internal memory array runs at speeds slower than the external bus, 00:02:45.600 --> 00:02:48.640 and sends more prefetch data per cycle, 00:02:48.640 --> 00:02:54.000 it keeps power requirements from getting too high, which, when combined with smaller die sizes, 00:02:54.000 --> 00:02:58.080 means new DDR generations don't need as much voltage. 00:02:58.080 --> 00:03:01.280 Of course, unlike many other generational improvements, 00:03:01.280 --> 00:03:06.400 one thing that newer versions of DDR do not feature is backwards compatibility. 00:03:06.400 --> 00:03:12.960 This is a stick of current gen DDR4, and you'll notice that when I hold it up next to this stick of DDR3, 00:03:12.960 --> 00:03:20.080 that the notches are in different places. That means that these two sticks cannot be used in the same motherboard. 00:03:20.080 --> 00:03:26.080 It's made this way on purpose, since the different generations of DDR have different electrical and signaling requirements. 00:03:26.080 --> 00:03:30.720 That, or it's just a plot to make all of us buy new memory every couple of years. 00:03:30.720 --> 00:03:35.040 Either way, I'll cough up whatever they want as long as it has RGB. 00:03:35.040 --> 00:03:41.040 So thanks for watching guys, if you like this video, hit like, 00:03:41.040 --> 00:03:46.560 hit subscribe, and hit us up in the comments section with your suggestions for topics that we should cover in the future.