1 00:00:00,000 --> 00:00:05,840 Imagine you could build a CPU in much the same way that we build PCs today, with parts from 2 00:00:05,840 --> 00:00:10,960 different manufacturers. This might actually become a reality in the near future thanks to a new 3 00:00:10,960 --> 00:00:16,560 standard called the UCI-E that's being pushed by a lot of major players in the tech industry. 4 00:00:16,560 --> 00:00:21,920 UCI-E stands for Universal Chiplet Interconnect Express, and that sounds a bit like PCI Express, 5 00:00:21,920 --> 00:00:26,640 right? Funnily enough, it's conceptually similar. Instead of adding to your computer's functionality 6 00:00:26,880 --> 00:00:32,000 with cards that fit into slots, UCI-E builds on a chip's functionality with additional 7 00:00:32,000 --> 00:00:38,320 chiplets. As an example, UCI-E might allow for a system on chip that has an Intel CPU, 8 00:00:38,320 --> 00:00:43,360 graphics from AMD, and a Wi-Fi radio from Qualcomm, a security enclave from Microsoft, 9 00:00:43,360 --> 00:00:48,560 and an AI accelerator from Google. We did see something like this in 2018 when Intel came out 10 00:00:48,560 --> 00:00:54,560 with those Kaby Lake G processors that featured AMD graphics, but UCI-E takes this concept 11 00:00:54,560 --> 00:01:00,000 further and also standardizes it. That's the important part, but hold on. Systems on a chip 12 00:01:00,000 --> 00:01:05,600 are already a thing, so what's the point of this modular approach? Well, most current SOCs are 13 00:01:05,600 --> 00:01:11,280 designed as a single monolithic chip, which presents some manufacturing disadvantages. You see, 14 00:01:11,280 --> 00:01:15,920 transistors have gotten much smaller, which makes our chips perform better and consume less power, 15 00:01:16,880 --> 00:01:21,440 but as we start hitting the limits of how small we can make them, the obvious way to continue 16 00:01:21,440 --> 00:01:26,640 improving performance is to make the chips bigger. But doing this raises the chances of a 17 00:01:26,640 --> 00:01:31,920 manufacturing defect, one little tiny defect, that will render the entire thing useless. So, 18 00:01:31,920 --> 00:01:35,920 instead of throwing the baby out with the bathwater, the industry is moving towards smaller 19 00:01:35,920 --> 00:01:42,480 chiplets that can be combined after the manufacturer. Moreover, UCI-E enables chiplets from different 20 00:01:42,480 --> 00:01:46,880 companies to be combined, another key difference from how chiplets are usually put together. 21 00:01:46,880 --> 00:01:50,800 You can even combine different chiplets that use different process nodes 22 00:01:50,800 --> 00:01:55,840 onto the same package. Believe it or not, wireless chips for things like Wi-Fi and 5G 23 00:01:55,840 --> 00:02:00,880 actually perform better with larger transistors because there isn't as much signal leakage, 24 00:02:00,880 --> 00:02:05,760 so you could combine a modem built on a larger node with a processor built on a smaller one. 25 00:02:05,760 --> 00:02:10,080 This opens the floodgates for companies to make different kinds of specialized chips 26 00:02:10,080 --> 00:02:14,960 at relatively low cost without having to design them from scratch, meaning it could be 27 00:02:14,960 --> 00:02:19,440 easier and cheaper in the end to get a phone with better AI for photo editing and voice 28 00:02:19,440 --> 00:02:23,760 transcription, for example, instead of like we have right now where we are relying on the 29 00:02:23,760 --> 00:02:28,240 apples of the world to make one chip to rule them all. Alright, let's talk about how these 30 00:02:28,240 --> 00:02:33,520 chiplets would communicate. You know how we compared UCI-E to PCI-E earlier in the video? 31 00:02:33,520 --> 00:02:39,120 UCI-E can actually use PCI Express to move data between chiplets, much the same way 32 00:02:39,120 --> 00:02:46,000 an NVIDIA graphics card can talk with an Intel CPU. UCI-E can also use another protocol called 33 00:02:46,000 --> 00:02:53,360 Compute Express Link, or CXL, which is basically a higher performance PCI-E variant for data centers. 34 00:02:53,360 --> 00:02:58,480 But because UCI-E is designed primarily for chiplets that sit right next to each other, 35 00:02:59,040 --> 00:03:05,520 it's much lower latency than a typical PCI Express implementation, and it can also move 36 00:03:05,600 --> 00:03:11,680 plenty of data. We're talking 1.3 terabytes per second through 1 millimeter of chip edge. 37 00:03:11,680 --> 00:03:16,160 That quick communication means that UCI-E chips could combine features that would otherwise 38 00:03:16,160 --> 00:03:21,600 need to be on separate chips or even separate cards while using a lot less power. But it's not 39 00:03:21,600 --> 00:03:27,440 quite the same thing as AMD's Infinity Fabric or Apple's Ultra Fusion used in the M1 Ultra, 40 00:03:27,440 --> 00:03:33,040 as directly connecting CPU cores like those do requires more complex designs. And keep in mind 41 00:03:33,040 --> 00:03:38,880 that UCI-E is a very new standard, so don't expect to see tons of PCs and phones and servers 42 00:03:38,880 --> 00:03:44,080 that could be rocking it immediately. But it could end up being quite a big deal down the line as 43 00:03:44,080 --> 00:03:51,600 industry heavy hitters like Intel, AMD, ARM, Google, Microsoft, Meta, Samsung, Qualcomm, and TSMC 44 00:03:51,600 --> 00:03:56,320 have all thrown their weight behind the standard. And keep an eye on Apple and NVIDIA. Apple has 45 00:03:56,320 --> 00:04:00,960 moved toward designing their own ARM-based silicon in-house, while NVIDIA continues to favor 46 00:04:00,960 --> 00:04:06,480 monolithic chips. But maybe we'll see them jump on the UCI-E train in the future if it does end 47 00:04:06,480 --> 00:04:11,680 up becoming a ubiquitous industry standard. In the meantime, I think I'll design my own phone 48 00:04:11,680 --> 00:04:20,640 chip with two 5G modems, so then it'll be 10G. That's how it works. 25G! Thanks for watching, 49 00:04:20,640 --> 00:04:24,240 guys. If you liked this video, hit like, hit subscribe, and hit us up in the comments section 50 00:04:24,240 --> 00:04:27,520 with your ideas for subjects that you want to see us cover in the future.